This invention relates to phase-locked loops (PLLs), and more particularly to improving input jitter attenuation in PLLs.
PLLs are used in many communications systems because of their remarkable versatility. For example, a PLL may be used to perform frequency synthesis, tone decoding, signal modulation and demodulation, clock generation, and pulse synchronization. In addition, PLLs may be used in analog, digital, and hybrid analog/digital systems.
A conventional PLL includes a phase detector and a voltage-controlled oscillator (VCO). The phase detector compares the phase of a reference frequency and a feedback frequency (e.g., the output of the VCO), and generates an output that is a function of the phase difference (e.g., a phase-error signal). The phase-error signal is used to adjust the VCO""s output frequency in the direction of the reference frequency. If conditions are right, the VCO locks to the reference frequency and maintains a fixed phase relation with the reference frequency.
In the simplest PLL, the phase detector may be connected directly to the VCO to form a first order loop (i.e., a loop that has a single pole in the closed loop transfer function). First order loops provide large phase margins; however, a first order loop""s bandwidth and steady-state phase-error are undesirably coupled. Therefore, most PLLs include an integrator circuit, for example, a loop filter, that is connected between the phase detector and the VCO to form, for example, a second order PLL (i.e., a loop that has two poles).
A second order PLL provides a loop that has a high loop gain at low frequencies. The loop filter typically includes a capacitor that stores a voltage that is used to control the VCO. However, the second pole provided by the additional integrator circuit of the loop filter generates a 90xc2x0 negative phase shift. The negative phase shift must be offset by a corresponding positive phase shift of a zero (i.e., a frequency that causes the loop transfer function to be zero) for the loop to remain stable. To provide an acceptable phase margin (i.e., the difference between 180xc2x0 and the phase shift around the loop at the unity gain frequency), a resistor, for example, may be placed in series with the capacitor of the loop filter to introduce the zero and cause the loop filter to be a low pass filter.
The low pass loop filter is able to attenuate some high frequency noise in the loop. However, any input jitter or phase noise introduced in the reference frequency (e.g., by surrounding circuits and/or the coupling of the reference frequency source to the PLL) may be amplified by the loop filter. As a result, the amplified input jitter may appear in the output of the VCO, and, if large enough, may cause significant interference from the adjacent channel in a transceiver. Typically, a sufficiently large damping ratio is chosen to reduce the effect of input jitter in the PLL.